FIG. 1 schematically shows a prior art switching converter 10. As illustrated in FIG. 1, the switching converter 10 comprises: an input capacitor Cin coupled between an input voltage Vin and a ground reference GND; a high-side power switch PM1 and a low-side power switch PM2 serially coupled between the input voltage Vin and the ground reference GND; an inductor L1 coupled between a switching node SW and the ground reference GND; an output capacitor Cout coupled between an output voltage Vout and the ground reference GND; and a controller 101 configured to control the high-side power switch PM1 and the low-side power switch PM2.
In the switching converter 10, the high-side power switch PM1 and the low-side power switch PM2 are alternately turned on and off. As a result, a square signal Vsw with certain duty ratio is generated at the switching node SW. The inductor L1 and the capacitor Cout are configured to filter the square signal Vsw so as to generate the output voltage Vout.
In FIG. 1, a path going through the input capacitor Cin, the high-side power switch PM1 and the low-side power switch PM2 forms a RLC resonance loop, wherein a parasitic inductance of the RLC resonance loop is represented by an inductor Lp shown in FIG. 1. The alternating on and off of the high-side power switch PM1 and the low-side power switch PM2 cause resonance along the RLC resonance loop, which further incurs a series of problems such as high frequency EMI (Electro Magnetic Interference), and voltage overshoot at the switching node SW.